Searched refs:regRLC_SRM_CNTL (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v12_1.c | 1940 tmp = RREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SRM_CNTL)); in gfx_v12_1_xcc_rlc_enable_srm()
1943 WREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SRM_CNTL), tmp); in gfx_v12_1_xcc_rlc_enable_srm()
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| H A D | gfx_v12_0.c | 2005 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL)); in gfx_v12_0_rlc_enable_srm()
2008 WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL), tmp); in gfx_v12_0_rlc_enable_srm()
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| H A D | gfx_v11_0.c | 2373 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL)); in gfx_v11_0_rlc_enable_srm()
2376 WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL), tmp); in gfx_v11_0_rlc_enable_srm()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 6584 #define regRLC_SRM_CNTL … macro
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| H A D | gc_9_4_2_offset.h | 5068 #define regRLC_SRM_CNTL … macro
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| H A D | gc_12_0_0_offset.h | 6466 #define regRLC_SRM_CNTL … macro
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| H A D | gc_11_0_3_offset.h | 10568 #define regRLC_SRM_CNTL … macro
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| H A D | gc_11_0_0_offset.h | 9966 #define regRLC_SRM_CNTL … macro
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