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Searched refs:regRLC_SMU_COMMAND (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h6644 #define regRLC_SMU_COMMAND … macro
H A Dgc_11_5_0_offset.h8973 #define regRLC_SMU_COMMAND … macro
H A Dgc_12_0_0_offset.h6780 #define regRLC_SMU_COMMAND … macro
H A Dgc_11_0_3_offset.h10934 #define regRLC_SMU_COMMAND … macro
H A Dgc_11_0_0_offset.h10322 #define regRLC_SMU_COMMAND … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c99 SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_COMMAND),