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Searched refs:regPWR_DISP_TIMER2_CONTROL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/smuio/
H A Dsmuio_13_0_3_offset.h65 #define regPWR_DISP_TIMER2_CONTROL_BASE_IDX … macro
H A Dsmuio_14_0_2_offset.h57 #define regPWR_DISP_TIMER2_CONTROL_BASE_IDX … macro
H A Dsmuio_13_0_6_offset.h63 #define regPWR_DISP_TIMER2_CONTROL_BASE_IDX … macro
H A Dsmuio_13_0_2_offset.h508 #define regPWR_DISP_TIMER2_CONTROL_BASE_IDX … macro