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Searched refs:regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h7186 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddpcs_4_2_3_offset.h108 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddpcs_4_2_2_offset.h91 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddpcs_4_2_0_offset.h104 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h12308 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddcn_3_5_1_offset.h10430 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddcn_3_5_0_offset.h10451 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddcn_3_1_4_offset.h11552 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddcn_3_1_2_offset.h12443 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro
H A Ddcn_3_1_6_offset.h13039 #define regPWRSEQ1_DC_GPIO_PWRSEQ_CTRL … macro