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Searched refs:regPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.h74 #define regPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX 1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h478 #define regPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h63 #define regPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX … macro