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Searched refs:regPHYESYMCLK_CLOCK_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h232 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_3_1_5_offset.h226 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_3_5_1_offset.h1367 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_3_5_0_offset.h1388 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_3_1_4_offset.h1529 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_3_1_2_offset.h437 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_3_2_1_offset.h232 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_3_1_6_offset.h639 #define regPHYESYMCLK_CLOCK_CNTL … macro
H A Ddcn_4_1_0_offset.h248 #define regPHYESYMCLK_CLOCK_CNTL … macro