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Searched refs:regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8639 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_5_offset.h9250 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_5_1_offset.h7315 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_5_0_offset.h7336 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_4_offset.h8544 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_2_offset.h9495 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_2_1_offset.h8638 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_3_1_6_offset.h9719 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro
H A Ddcn_4_1_0_offset.h9347 #define regOTG3_OTG_VERTICAL_INTERRUPT0_CONTROL … macro