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Searched refs:regOTG1_OTG_V_TOTAL_MID (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8135 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_5_offset.h8748 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_3_5_1_offset.h6761 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_3_5_0_offset.h6782 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_4_offset.h8040 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_2_offset.h8987 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_3_2_1_offset.h8134 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_6_offset.h9211 #define regOTG1_OTG_V_TOTAL_MID … macro
H A Ddcn_4_1_0_offset.h8783 #define regOTG1_OTG_V_TOTAL_MID … macro