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Searched refs:regOTG1_OTG_DRR_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8313 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_1_5_offset.h8926 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_5_1_offset.h6959 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_5_0_offset.h6980 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_1_4_offset.h8218 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_1_2_offset.h9167 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_2_1_offset.h8312 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_3_1_6_offset.h9391 #define regOTG1_OTG_DRR_CONTROL … macro
H A Ddcn_4_1_0_offset.h8985 #define regOTG1_OTG_DRR_CONTROL … macro