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Searched refs:regOTG1_OTG_COUNT_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8185 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_5_offset.h8798 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_3_5_1_offset.h6817 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_3_5_0_offset.h6838 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_4_offset.h8090 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_2_offset.h9037 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_3_2_1_offset.h8184 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_6_offset.h9261 #define regOTG1_OTG_COUNT_CONTROL macro
H A Ddcn_4_1_0_offset.h8841 #define regOTG1_OTG_COUNT_CONTROL macro