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Searched refs:regOTG0_OTG_V_TOTAL_MID (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7923 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_5_offset.h8536 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_3_5_1_offset.h6527 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_3_5_0_offset.h6548 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_4_offset.h7828 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_2_offset.h8773 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_3_2_1_offset.h7922 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_3_1_6_offset.h8997 #define regOTG0_OTG_V_TOTAL_MID … macro
H A Ddcn_4_1_0_offset.h8545 #define regOTG0_OTG_V_TOTAL_MID … macro