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Searched refs:regOTG0_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_5_1_offset.h6534 #define regOTG0_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6555 #define regOTG0_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8552 #define regOTG0_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX … macro