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Searched refs:regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8012 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8623 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h6622 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6643 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7917 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8862 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h8011 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9086 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8642 #define regOTG0_OTG_VERTICAL_INTERRUPT2_CONTROL_BASE_IDX … macro