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Searched refs:regOTG0_OTG_INTERRUPT_CONTROL (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7993 #define regOTG0_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_5_1_offset.h6603 #define regOTG0_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_5_0_offset.h6624 #define regOTG0_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_1_4_offset.h7898 #define regOTG0_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_1_2_offset.h8843 #define regOTG0_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_2_1_offset.h7992 #define regOTG0_OTG_INTERRUPT_CONTROL macro
H A Ddcn_3_1_6_offset.h9067 #define regOTG0_OTG_INTERRUPT_CONTROL macro
H A Ddcn_4_1_0_offset.h8623 #define regOTG0_OTG_INTERRUPT_CONTROL macro