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Searched refs:regOTG0_OTG_GSL_VSYNC_GAP (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h8055 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_3_1_5_offset.h8668 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_3_5_1_offset.h6681 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_3_5_0_offset.h6702 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_3_1_4_offset.h7960 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_3_1_2_offset.h8907 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_3_2_1_offset.h8054 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_3_1_6_offset.h9131 #define regOTG0_OTG_GSL_VSYNC_GAP … macro
H A Ddcn_4_1_0_offset.h8701 #define regOTG0_OTG_GSL_VSYNC_GAP … macro