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Searched refs:regOTG0_OTG_FLOW_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7948 #define regOTG0_OTG_FLOW_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8561 #define regOTG0_OTG_FLOW_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7853 #define regOTG0_OTG_FLOW_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8798 #define regOTG0_OTG_FLOW_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h7947 #define regOTG0_OTG_FLOW_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9022 #define regOTG0_OTG_FLOW_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8574 #define regOTG0_OTG_FLOW_CONTROL_BASE_IDX … macro