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Searched refs:regOTG0_OTG_COUNT_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h7973 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_5_offset.h8586 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_3_5_1_offset.h6583 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_3_5_0_offset.h6604 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_4_offset.h7878 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_2_offset.h8823 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_3_2_1_offset.h7972 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_3_1_6_offset.h9047 #define regOTG0_OTG_COUNT_CONTROL macro
H A Ddcn_4_1_0_offset.h8603 #define regOTG0_OTG_COUNT_CONTROL macro