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Searched refs:regMPC_OUT2_CSC_C31_C32_A_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h6926 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h7255 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h13148 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h13169 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h14235 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h7496 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h6925 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h7716 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h7705 #define regMPC_OUT2_CSC_C31_C32_A_BASE_IDX … macro