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Searched refs:regMPC_OUT0_CSC_C31_C32_B_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h6886 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h7215 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h13108 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h13129 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h14195 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h7456 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h6885 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h7676 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h7665 #define regMPC_OUT0_CSC_C31_C32_B_BASE_IDX … macro