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Searched refs:regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5613 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_3_1_5_offset.h7070 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_3_5_1_offset.h12891 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_3_5_0_offset.h12912 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_3_1_4_offset.h13978 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_3_1_2_offset.h7311 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_3_2_1_offset.h5612 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_3_1_6_offset.h7531 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro
H A Ddcn_4_1_0_offset.h6152 #define regMPCC_OGAM3_MPCC_OGAM_RAMB_START_BASE_CNTL_G … macro