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Searched refs:regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5529 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_3_1_5_offset.h6986 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_3_5_1_offset.h12807 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_3_5_0_offset.h12828 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_3_1_4_offset.h13894 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_3_1_2_offset.h7227 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_3_2_1_offset.h5528 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_3_1_6_offset.h7447 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro
H A Ddcn_4_1_0_offset.h6068 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_B … macro