Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5175 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_1_5_offset.h6632 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_5_1_offset.h12453 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_5_0_offset.h12474 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_1_4_offset.h13540 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_1_2_offset.h6873 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_2_1_offset.h5174 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_3_1_6_offset.h7093 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro
H A Ddcn_4_1_0_offset.h5714 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_SLOPE_CNTL_B … macro