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Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5173 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_5_offset.h6630 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_5_1_offset.h12451 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_5_0_offset.h12472 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_4_offset.h13538 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_2_offset.h6871 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_2_1_offset.h5172 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_3_1_6_offset.h7091 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro
H A Ddcn_4_1_0_offset.h5712 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_START_CNTL_R … macro