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Searched refs:regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5193 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_5_offset.h6650 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_5_1_offset.h12471 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_5_0_offset.h12492 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_4_offset.h13558 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_2_offset.h6891 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_2_1_offset.h5192 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_6_offset.h7111 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_4_1_0_offset.h5732 #define regMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL2_G … macro