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Searched refs:regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5069 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_5_offset.h6526 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_3_5_1_offset.h12347 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_3_5_0_offset.h12368 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_4_offset.h13434 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_2_offset.h6767 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_3_2_1_offset.h5068 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_3_1_6_offset.h6987 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro
H A Ddcn_4_1_0_offset.h5608 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_START_SLOPE_CNTL_R … macro