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Searched refs:regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5081 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_3_1_5_offset.h6538 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_3_5_1_offset.h12359 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_3_5_0_offset.h12380 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_3_1_4_offset.h13446 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_3_1_2_offset.h6779 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_3_2_1_offset.h5080 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_3_1_6_offset.h6999 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro
H A Ddcn_4_1_0_offset.h5620 #define regMPCC_OGAM0_MPCC_OGAM_RAMB_END_CNTL1_G … macro