Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5013 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_5_offset.h6470 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_5_1_offset.h12291 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_5_0_offset.h12312 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_4_offset.h13378 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_2_offset.h6711 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_2_1_offset.h5012 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_3_1_6_offset.h6931 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro
H A Ddcn_4_1_0_offset.h5552 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL2_G … macro