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Searched refs:regMPCC3_MPCC_TOP_GAIN (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4889 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_3_1_5_offset.h6324 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_3_5_1_offset.h12236 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_3_5_0_offset.h12257 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_3_1_4_offset.h13326 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_3_1_2_offset.h6565 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_3_2_1_offset.h4888 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_3_1_6_offset.h6785 #define regMPCC3_MPCC_TOP_GAIN macro
H A Ddcn_4_1_0_offset.h5412 #define regMPCC3_MPCC_TOP_GAIN macro