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Searched refs:regMPCC2_MPCC_STATUS_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4872 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h6307 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h12219 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h12240 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h13309 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h6548 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4871 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h6768 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h5395 #define regMPCC2_MPCC_STATUS_BASE_IDX … macro