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Searched refs:regMPCC2_MPCC_OPP_ID_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4848 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h6285 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h12195 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h12216 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h13287 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h6526 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4847 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h6746 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h5371 #define regMPCC2_MPCC_OPP_ID_BASE_IDX … macro