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Searched refs:regMP1_SMN_C2PMSG_75 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_14_0_0_offset.h179 #define regMP1_SMN_C2PMSG_75 … macro
H A Dmp_13_0_4_offset.h318 #define regMP1_SMN_C2PMSG_75 … macro
H A Dmp_13_0_2_offset.h325 #define regMP1_SMN_C2PMSG_75 … macro
H A Dmp_13_0_8_offset.h272 #define regMP1_SMN_C2PMSG_75 … macro
H A Dmp_13_0_0_offset.h269 #define regMP1_SMN_C2PMSG_75 … macro
H A Dmp_13_0_6_offset.h270 #define regMP1_SMN_C2PMSG_75 … macro
H A Dmp_14_0_2_offset.h179 #define regMP1_SMN_C2PMSG_75 … macro
H A Dmp_13_0_5_offset.h271 #define regMP1_SMN_C2PMSG_75 … macro
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c2115 smu->debug_msg_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_75); in smu_v14_0_2_set_smu_mailbox_registers()