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Searched refs:regMP1_SMN_C2PMSG_53 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_14_0_0_offset.h135 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_13_0_4_offset.h274 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_13_0_2_offset.h281 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_13_0_8_offset.h228 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_15_0_0_offset.h212 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_13_0_0_offset.h225 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_13_0_6_offset.h226 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_14_0_2_offset.h135 #define regMP1_SMN_C2PMSG_53 … macro
H A Dmp_13_0_5_offset.h227 #define regMP1_SMN_C2PMSG_53 … macro
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c2136 ctl->config.debug_param_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_53); in smu_v14_0_2_init_msg_ctl()