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Searched refs:regMP0_SMN_C2PMSG_33 (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_13_0_4_offset.h33 #define regMP0_SMN_C2PMSG_33 … macro
H A Dmp_13_0_2_offset.h33 #define regMP0_SMN_C2PMSG_33 … macro
H A Dmp_13_0_8_offset.h34 #define regMP0_SMN_C2PMSG_33 … macro
H A Dmp_13_0_0_offset.h31 #define regMP0_SMN_C2PMSG_33 … macro
H A Dmp_13_0_6_offset.h32 #define regMP0_SMN_C2PMSG_33 … macro
H A Dmp_13_0_5_offset.h33 #define regMP0_SMN_C2PMSG_33 … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v13_0.c160 psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_33), in psp_v13_0_wait_for_vmbx_ready()