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Searched refs:regMP0_SMN_C2PMSG_102 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v13_0_4.c240 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v13_0_4_ring_create()
314 data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102); in psp_v13_0_4_ring_get_wptr()
326 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, value); in psp_v13_0_4_ring_set_wptr()
H A Dpsp_v13_0.c386 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v13_0_ring_create()
460 data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102); in psp_v13_0_ring_get_wptr()
472 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, value); in psp_v13_0_ring_set_wptr()
/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_13_0_4_offset.h171 #define regMP0_SMN_C2PMSG_102 macro
H A Dmp_13_0_2_offset.h171 #define regMP0_SMN_C2PMSG_102 macro
H A Dmp_13_0_8_offset.h172 #define regMP0_SMN_C2PMSG_102 macro
H A Dmp_13_0_0_offset.h169 #define regMP0_SMN_C2PMSG_102 macro
H A Dmp_13_0_6_offset.h170 #define regMP0_SMN_C2PMSG_102 macro
H A Dmp_13_0_5_offset.h171 #define regMP0_SMN_C2PMSG_102 macro