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Searched refs:regMMVM_L2_PROTECTION_FAULT_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmhub_v3_0_2.c430 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v3_0_2_set_fault_enable_default()
460 WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp); in mmhub_v3_0_2_set_fault_enable_default()
489 SOC15_REG_OFFSET(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v3_0_2_init()
H A Dmmhub_v3_0_1.c419 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v3_0_1_set_fault_enable_default()
449 WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp); in mmhub_v3_0_1_set_fault_enable_default()
478 SOC15_REG_OFFSET(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v3_0_1_init()
H A Dmmhub_v3_0.c431 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v3_0_set_fault_enable_default()
461 WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp); in mmhub_v3_0_set_fault_enable_default()
490 SOC15_REG_OFFSET(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v3_0_init()
H A Dmmhub_v4_1_0.c426 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v4_1_0_set_fault_enable_default()
456 WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp); in mmhub_v4_1_0_set_fault_enable_default()
485 SOC15_REG_OFFSET(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v4_1_0_init()
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_3_3_0_offset.h670 #define regMMVM_L2_PROTECTION_FAULT_CNTL … macro
H A Dmmhub_4_1_0_offset.h746 #define regMMVM_L2_PROTECTION_FAULT_CNTL … macro
H A Dmmhub_3_0_2_offset.h756 #define regMMVM_L2_PROTECTION_FAULT_CNTL … macro
H A Dmmhub_3_0_0_offset.h798 #define regMMVM_L2_PROTECTION_FAULT_CNTL … macro
H A Dmmhub_3_0_1_offset.h1050 #define regMMVM_L2_PROTECTION_FAULT_CNTL … macro