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Searched refs:regMMVM_L2_CNTL4 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmhub_v3_0_2.c266 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp); in mmhub_v3_0_2_init_cache_regs()
H A Dmmhub_v3_0_1.c267 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp); in mmhub_v3_0_1_init_cache_regs()
H A Dmmhub_v3_0.c274 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp); in mmhub_v3_0_init_cache_regs()
H A Dmmhub_v3_3.c263 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp); in mmhub_v3_3_init_cache_regs()
H A Dmmhub_v4_1_0.c275 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp); in mmhub_v4_1_0_init_cache_regs()
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_3_3_0_offset.h700 #define regMMVM_L2_CNTL4 … macro
H A Dmmhub_4_1_0_offset.h778 #define regMMVM_L2_CNTL4 … macro
H A Dmmhub_3_0_2_offset.h786 #define regMMVM_L2_CNTL4 … macro
H A Dmmhub_3_0_0_offset.h828 #define regMMVM_L2_CNTL4 … macro
H A Dmmhub_3_0_1_offset.h1080 #define regMMVM_L2_CNTL4 … macro