Home
last modified time | relevance | path

Searched refs:regMMVM_L2_CNTL2 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmhub_v3_0_2.c245 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_0_2_init_cache_regs()
248 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_0_2_init_cache_regs()
H A Dmmhub_v3_0_1.c245 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_0_1_init_cache_regs()
248 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_0_1_init_cache_regs()
H A Dmmhub_v3_0.c246 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_0_init_cache_regs()
249 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_0_init_cache_regs()
H A Dmmhub_v4_1_0.c240 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v4_1_0_init_cache_regs()
243 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v4_1_0_init_cache_regs()
H A Dmmhub_v4_2_0.c385 tmp = RREG32_SOC15(MMHUB, GET_INST(MMHUB, i), regMMVM_L2_CNTL2); in mmhub_v4_2_0_mid_init_cache_regs()
390 WREG32_SOC15(MMHUB, GET_INST(MMHUB, i), regMMVM_L2_CNTL2, tmp); in mmhub_v4_2_0_mid_init_cache_regs()
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_3_3_0_offset.h656 #define regMMVM_L2_CNTL2 … macro
H A Dmmhub_4_1_0_offset.h732 #define regMMVM_L2_CNTL2 … macro
H A Dmmhub_3_0_2_offset.h742 #define regMMVM_L2_CNTL2 … macro
H A Dmmhub_3_0_0_offset.h784 #define regMMVM_L2_CNTL2 … macro
H A Dmmhub_3_0_1_offset.h1036 #define regMMVM_L2_CNTL2 … macro