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Searched refs:regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmhub_v3_0_2.c134 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_2_setup_vm_pt_regs()
475 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32); in mmhub_v3_0_2_init()
494 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32; in mmhub_v3_0_2_init()
H A Dmmhub_v3_0_1.c143 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_1_setup_vm_pt_regs()
465 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32); in mmhub_v3_0_1_init()
484 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32; in mmhub_v3_0_1_init()
H A Dmmhub_v3_0.c141 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_0_setup_vm_pt_regs()
483 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32); in mmhub_v3_0_init()
502 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32; in mmhub_v3_0_init()
H A Dmmhub_v3_3.c138 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v3_3_setup_vm_pt_regs()
511 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32); in mmhub_v3_3_init()
530 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32; in mmhub_v3_3_init()
H A Dmmhub_v4_1_0.c141 WREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v4_1_0_setup_vm_pt_regs()
485 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32); in mmhub_v4_1_0_init()
504 regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32; in mmhub_v4_1_0_init()
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_3_3_0_offset.h952 #define regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 … macro
H A Dmmhub_4_1_0_offset.h1094 #define regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 … macro
H A Dmmhub_3_0_2_offset.h1046 #define regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 … macro
H A Dmmhub_3_0_0_offset.h1080 #define regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 … macro
H A Dmmhub_3_0_1_offset.h1332 #define regMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 … macro