Searched refs:regMC_VM_MX_L1_TLB_CNTL (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v1_2.c | 204 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_2_xcc_init_tlb_regs()
218 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_2_xcc_init_tlb_regs()
460 tmp = RREG32_SOC15(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_2_xcc_gart_disable()
466 WREG32_SOC15_RLC(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_2_xcc_gart_disable()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| H A D | mmhub_1_8_0_offset.h | 3136 #define regMC_VM_MX_L1_TLB_CNTL … macro
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| H A D | mmhub_1_7_offset.h | 5122 #define regMC_VM_MX_L1_TLB_CNTL … macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 2070 #define regMC_VM_MX_L1_TLB_CNTL … macro
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| H A D | gc_9_4_2_offset.h | 7388 #define regMC_VM_MX_L1_TLB_CNTL … macro
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