Home
last modified time | relevance | path

Searched refs:regGRBM_STATUS (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsoc24.c115 { SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS)},
H A Dsoc21.c257 { SOC15_REG_ENTRY(GC, 0, regGRBM_STATUS)},
H A Dgfx_v9_4_3.c68 SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS),
2425 if (REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, i), regGRBM_STATUS), in gfx_v9_4_3_is_idle()
2452 tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_STATUS); in gfx_v9_4_3_soft_reset()
H A Dgfx_v12_0.c67 SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS),
3700 if (REG_GET_FIELD(RREG32_SOC15(GC, 0, regGRBM_STATUS), in gfx_v12_0_is_idle()
3715 tmp = RREG32_SOC15(GC, 0, regGRBM_STATUS) & in gfx_v12_0_wait_for_idle()
H A Dgfx_v11_0.c103 SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS),
4785 if (REG_GET_FIELD(RREG32_SOC15(GC, 0, regGRBM_STATUS), in gfx_v11_0_is_idle()
4800 tmp = RREG32_SOC15(GC, 0, regGRBM_STATUS) & in gfx_v11_0_wait_for_idle()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h38 #define regGRBM_STATUS … macro
H A Dgc_9_4_2_offset.h3318 #define regGRBM_STATUS … macro
H A Dgc_11_5_0_offset.h961 #define regGRBM_STATUS … macro
H A Dgc_12_0_0_offset.h2002 #define regGRBM_STATUS … macro
H A Dgc_11_0_3_offset.h1910 #define regGRBM_STATUS … macro
H A Dgc_11_0_0_offset.h1846 #define regGRBM_STATUS … macro