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Searched refs:regGRBM_SOFT_RESET (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v7_1.c764 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp); in sdma_v7_1_soft_reset()
765 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v7_1_soft_reset()
769 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0); in sdma_v7_1_soft_reset()
770 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v7_1_soft_reset()
H A Dsdma_v7_0.c773 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp); in sdma_v7_0_soft_reset()
774 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v7_0_soft_reset()
778 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0); in sdma_v7_0_soft_reset()
779 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v7_0_soft_reset()
H A Dsdma_v6_0.c782 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp); in sdma_v6_0_soft_reset()
783 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v6_0_soft_reset()
787 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0); in sdma_v6_0_soft_reset()
788 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v6_0_soft_reset()
H A Dgfx_v9_4_3.c2574 tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET); in gfx_v9_4_3_soft_reset()
2577 WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp); in gfx_v9_4_3_soft_reset()
2578 tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET); in gfx_v9_4_3_soft_reset()
2583 WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp); in gfx_v9_4_3_soft_reset()
2584 tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET); in gfx_v9_4_3_soft_reset()
H A Dgfx_v11_0.c5241 grbm_soft_reset = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in gfx_v11_0_soft_reset()
5252 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset); in gfx_v11_0_soft_reset()
5254 grbm_soft_reset = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in gfx_v11_0_soft_reset()
5265 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset); in gfx_v11_0_soft_reset()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h44 #define regGRBM_SOFT_RESET … macro
H A Dgc_9_4_2_offset.h3324 #define regGRBM_SOFT_RESET … macro
H A Dgc_12_0_0_offset.h2010 #define regGRBM_SOFT_RESET … macro
H A Dgc_11_0_3_offset.h1918 #define regGRBM_SOFT_RESET … macro
H A Dgc_11_0_0_offset.h1854 #define regGRBM_SOFT_RESET … macro