Searched refs:regGRBM_GFX_CNTL (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | soc21.c | 278 WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, grbm_gfx_cntl); in soc21_grbm_select()
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| H A D | gfx_v12_0.c | 747 reg_access_ctrl->grbm_cntl = SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_CNTL); in gfx_v12_0_init_rlcg_reg_access_ctrl() 2691 tmp = RREG32_SOC15(GC, 0, regGRBM_GFX_CNTL); in gfx_v12_0_cp_gfx_switch_pipe() 2694 WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp); in gfx_v12_0_cp_gfx_switch_pipe()
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| H A D | gfx_v11_0.c | 906 reg_access_ctrl->grbm_cntl = SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_CNTL); in gfx_v11_0_init_rlcg_reg_access_ctrl() 3714 tmp = RREG32_SOC15(GC, 0, regGRBM_GFX_CNTL); in gfx_v11_0_cp_gfx_switch_pipe() 3717 WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp); in gfx_v11_0_cp_gfx_switch_pipe()
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| H A D | gfx_v12_1.c | 531 SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regGRBM_GFX_CNTL); in gfx_v12_1_init_rlcg_reg_access_ctrl()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 76 #define regGRBM_GFX_CNTL … macro
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| H A D | gc_9_4_2_offset.h | 3354 #define regGRBM_GFX_CNTL … macro
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| H A D | gc_12_0_0_offset.h | 4198 #define regGRBM_GFX_CNTL … macro
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| H A D | gc_11_0_3_offset.h | 6484 #define regGRBM_GFX_CNTL … macro
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| H A D | gc_11_0_0_offset.h | 6204 #define regGRBM_GFX_CNTL … macro
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