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Searched refs:regGFX_IMU_RLC_RAM_DATA (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0_3.c132 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data); in program_rlc_ram_register_setting()
137 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0); in program_rlc_ram_register_setting()
H A Dimu_v12_0.c275 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data); in program_imu_rlc_ram_old()
356 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data); in program_imu_rlc_ram()
386 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0); in imu_v12_0_program_rlc_ram()
H A Dimu_v11_0.c342 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, data); in program_imu_rlc_ram()
347 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_DATA, 0); in program_imu_rlc_ram()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h9595 #define regGFX_IMU_RLC_RAM_DATA macro
H A Dgc_12_0_0_offset.h7153 #define regGFX_IMU_RLC_RAM_DATA macro
H A Dgc_11_0_3_offset.h11620 #define regGFX_IMU_RLC_RAM_DATA macro
H A Dgc_11_0_0_offset.h11217 #define regGFX_IMU_RLC_RAM_DATA macro