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Searched refs:regGCMC_VM_FB_LOCATION_TOP (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0_3.c75 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x000065ff, 0xe0000000),
127 else if (entry->reg == regGCMC_VM_FB_LOCATION_TOP) in program_rlc_ram_register_setting()
H A Dimu_v11_0.c243 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x000061ff, 0xe0000000),
297 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x000061ff, 0xe0000000),
344 else if (entry->reg == regGCMC_VM_FB_LOCATION_TOP) in program_imu_rlc_ram()
H A Dimu_v12_0.c236 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_FB_LOCATION_TOP, 0x0000600f, 0x1c0000),
276 else if (entry->reg == regGCMC_VM_FB_LOCATION_TOP) in program_imu_rlc_ram_old()
310 else if (reg == SOC15_REG_OFFSET(GC, 0, regGCMC_VM_FB_LOCATION_TOP)) in imu_v12_init_gfxhub_settings()
H A Dgfxhub_v11_5_0.c365 WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP, in gfxhub_v11_5_0_gart_enable()
H A Dgfxhub_v3_0.c362 WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP, in gfxhub_v3_0_gart_enable()
H A Dgfxhub_v12_0.c370 WREG32_SOC15(GC, 0, regGCMC_VM_FB_LOCATION_TOP, in gfxhub_v12_0_gart_enable()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_12_0_0_offset.h2874 #define regGCMC_VM_FB_LOCATION_TOP … macro
H A Dgc_11_0_3_offset.h3006 #define regGCMC_VM_FB_LOCATION_TOP … macro
H A Dgc_11_0_0_offset.h2832 #define regGCMC_VM_FB_LOCATION_TOP … macro