Home
last modified time | relevance | path

Searched refs:regDWB_MEM_PWR_CTRL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h712 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_3_1_5_offset.h806 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_3_5_1_offset.h10991 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_3_5_0_offset.h11012 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_3_1_4_offset.h12114 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_3_1_2_offset.h1103 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_3_2_1_offset.h712 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_3_1_6_offset.h1307 #define regDWB_MEM_PWR_CTRL macro
H A Ddcn_4_1_0_offset.h837 #define regDWB_MEM_PWR_CTRL macro