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Searched refs:regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h12180 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10858 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10879 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11981 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h12164 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h12470 #define regDSC_TOP3_DSC_TOP_CONTROL_BASE_IDX … macro