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Searched refs:regDSCL3_SCL_COEF_RAM_TAP_SELECT (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4463 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_3_1_5_offset.h5602 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_3_5_1_offset.h5732 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_3_5_0_offset.h5753 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_3_1_4_offset.h6752 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_3_1_2_offset.h5843 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_3_2_1_offset.h4462 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_3_1_6_offset.h6063 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro
H A Ddcn_4_1_0_offset.h4894 #define regDSCL3_SCL_COEF_RAM_TAP_SELECT macro