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Searched refs:regDSCL3_OBUF_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4527 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_3_1_5_offset.h5666 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_3_5_1_offset.h5796 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_3_5_0_offset.h5817 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_3_1_4_offset.h6816 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_3_1_2_offset.h5907 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_3_2_1_offset.h4526 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_3_1_6_offset.h6127 #define regDSCL3_OBUF_CONTROL macro
H A Ddcn_4_1_0_offset.h4958 #define regDSCL3_OBUF_CONTROL macro