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Searched refs:regDSCL3_LB_MEMORY_CTRL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4520 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h5659 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h5789 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5810 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6809 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h5900 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4519 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h6120 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4951 #define regDSCL3_LB_MEMORY_CTRL_BASE_IDX … macro