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Searched refs:regDSCL2_OTG_H_BLANK_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4118 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h4955 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h5365 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5386 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6105 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h5196 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4117 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h5416 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4430 #define regDSCL2_OTG_H_BLANK_BASE_IDX … macro